| SOC Block SWITCH Module Description | Module Overview: This describes all the registers in the Switch Scanner. |
| SWITCH Module Register Summary | Register Name | Base Address | POR |
| SWITCH_IRQ_STATUS | 0xFFFB1200 | 0x00000000 |
| SWITCH_IRQ_EN | 0xFFFB1204 | 0x00000000 |
| SWITCH_CONFIG | 0xFFFB1208 | 0x00000000 |
| SWITCH_IRQ_STATUS Register: | Mode: Normal | Address: 0xFFFB1200 | POR: 0x00000000 | |
| Register Overview: This register stores interrupts from the switch scanner to the microprocessor. | ||||
| Bit | 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
| Mne | ||||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| Mne | IDLE | INT | ||||||||||||||
| Bit(s) | Mne | Access | Name | Field Description |
| 31:2 | RSV | RO | Reserved | Reserved for future use. |
| 1 | IDLE | R/W1C | IDLE | A 1 indicates that the switch scanner has cleared the state RAM and is idle after receiving the suspend signal. Field is cleared by writing a 1 to it after it is read. |
| 0 | INT | R/W1C | INTERUPT | A 1 indicates that the switch scanner FIFO is not empty and that the uP needs to read it. Field is cleared by writing a 1 to it after a read. |
| SWITCH_IRQ_EN Register: | Mode: Normal | Address: 0xFFFB1204 | POR: 0x00000000 | |
|
Register Overview:
This register enables the individual interrupts described in the IRQ_STATUS Register.
See the IRQ STATUS Register Definition. |
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| Bit | 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
| Mne | ||||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| Mne | IDLE | INT | ||||||||||||||
| Bit(s) | Mne | Access | Name | Field Description |
| 31:2 | RSV | RO | Reserved | Reserved for future use. |
| 1 | IDLE | R/W | IDLE_EN | This bit enables the FIFO Not Empty interrupt. A 1 indicates that the interrupt is enabled. A 0 indicates that it is not enabled. |
| 0 | INT | R/W | INT_EN | This bit enables the switch scanner Idle interrupt. A 1 indicates that the interrupt is enabled. A 0 indicates that it is not enabled. |
| SWITCH_CONFIG Register: | Mode: Normal | Address: 0xFFFB1208 | POR: 0x00000000 | |
| Register Overview: This register configures the switch scanner to use the standard 5x5 switch matrix or an enhanced 16x18 switch matrix. It also controls the switch scanner behavior when it is suspended. | ||||
| Bit | 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
| Mne | ||||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| Mne | SROW | SMODE | MODE | |||||||||||||
| Bit(s) | Mne | Access | Name | Field Description |
| 31:12 | RSV | RO | Reserved | Reserved for future use. |
| 11:9 | SROW | R/W | SUSPEND_ROW | Active Row when the chip is suspended and in default mode. Valid values are 0-4. |
| 8 | SMODE | R/W | SUSPEND_MODE | Controls behavior when chip is suspended in default mode. When set to a 1, a single switch matrix row is active when the chip is suspended. When 0, every switch matrix row is active. |
| 7:1 | RSV | RO | Reserved | Reserved for future use. |
| 0 | MODE | R/W | MODE | When this bit is set to 0, switch module scans a 5x5 switch matrix. When this bit is set to 1, switch module scans a 16x18 switch matrix. |