Barbay Consulting News
A Leader in SoC Development Tools
Copyright 2010, Lisa K. Barbay
Under Construction.

This page will focus on new Verification technogolgies and
how we can help you both in Simulation and board bring up.

  • New Verification APIs and languages:
  • SystemVerilog, SystemC (and Verilog, VHDL)
  • VMM,
  • OVM
  • OVL
  • IP-XACT, SystemRdl, SOAP (we use Python -
    but whatever tool you want we will
                      adapt too.


  • Real Firmware written in C, Assembly language (uP
    specific- for start-up code), or Embedded              
    C++.  This will go on from early simulation (including
    but not limited to interrupt handlers, start-up code,
    linker loader maps, Makefiles to RDK stage and
    bringing up new silicon, new RDK, and existing
    firmware.  Much more firmware can be written after
    the kinks are checked out (missing resisitors, byte
    lane swaps, foundry crosses pins, etc.)
      This includes experience with Oscilliscopes, Logic
      Analyzers, Bus Analyzers, etc.

  • FPGA prototyping.  We are no strangers to RTOSes
    and this is the best way to bring this to the "Pre-
    Silicon Environment."

  •  Together we have 70+ years under our belts.  We
    have knowledge of many Simulators, Debuggers,
    IDEs, Waveform Viewers, FPGAs and MANY
    embedded processors(Mostly RISC) including the
    most common (ARM (including Cortex Series),
    PowerPC, MIPS, 8051,ARC, Seimens, Intel 8060, TI-
    DSP,CSR Kalimba, AMD)